Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder

A Novel Method Design Multiplexer Quaternary with CNTFET

Background and Objectives: In recent decades, due to the effect of the short channel, the use of CMOS transistors in the nanoscale has become a major concern. One option to deal with this issue is the use of nano-transistors. Methods: Using nano-transistors and multi-valued logic (MVL) can reduce the level of chips and connections and have a direct impact on power consumption. The present study...

Evolutionary analog circuit design on a programmable analog multiplexer array

This work discusses an Evolvable Hardware (EHW) platform for the synthesis of analog electronic circuits. The EHW analog platform, named PAMA (Programmable Analog Multiplexer Array), is a reconfigurable platform that consists of integrated circuits whose internal connections can be programmed by Evolutionary Computation techniques, such as Genetic Algorithms, to synthesize circuits. The PAMA is...

Novel Design of A 4:1 Multiplexer Circuit Using Reversible Logic

Multiplexer Selection

www.xilinx.com 1 © 2008 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. It is obvious that a multiplexer is used to select one of several input signals; however, in this white paper, I will consider a variety of ways in which multiplexers can be...

Binding Refinement for Multiplexer Reduction

In behavioral synthesis for resource shared architecture, multiplexers are inserted between registers and functional units as a result of binding if necessary. Multiplexer optimization in binding is important for performance, area and power of a synthesized circuit. In this paper, we propose a binding algorithm to reduce total amount of multiplexer ports. Unlike most of the previous works in wh...